3D NAND and TSV Process

The article below discusses the development of 3D NAND flash memory. The explanation of the difficulty of creating these 3D structures uses the term Through Silicon Via (TSV) to explain how to connect vertically between layers that are one above the other inside an IC chip.

However, TSV is used only when we are connecting between individual silicon IC chips one to another. Holes are drilled through each chip to connect them electrically when they are stacked on top of each other.

See 3DSemiconductors-TSV w/ DRAM Memory.

Samsung and its competitors are building the 3D  NAND transistors inside each chip. This 3D approach has its own difficulties of connecting all the vertical layers one to the next.

See more at 3D NAND Flash Advances and at Samsung 3DStacked NAND Flash has Engineering Samples

Ron

Insightful, timely, and accurate semiconductor consulting.
Semiconductor information and news at - http://www.maltiel-consulting.com/

Silicon bungalow? Nah, I'll have SK Hynix's 4-storey flash condo

Chip-embiggening 3D NAND wizardry expands upwards

By Chris Mellor, 28 Apr 2014 

DRAM and flash fabber SK Hynix is set to mass produce 3D NAND by the end of this year, while Micron Technology sees its own 3D mass production kicking in during the second half of 2015.

By building NAND chips with layers of current planar cells (known as 2D NAND) the amount of capacity in a chip's footprint can be raised without needing to go to smaller flash cell geometries.

With smaller cell sizes, its working life (endurance) goes down while its error rate goes up. SanDisk has just announced a 15nm process (1Z), moving down from the 19nm (1X) size used by it and its fab partner Toshiba.

Samsung has SSDs available using 19nm technology. SK Hynix began full-scale production of 16nm flash chips at the end of 2013.

Micron expects to have a 16nm SSD in the first half of this year. This can keep it going on the capacity raising front but it seems unlikely that it, and the industry will move to sub-15nm cell sizes because of these scaling-related problems.

That means its ability to increase planar chip capacity without increasing the chip's footprint size will come to an end, and so 3D NAND, with stacked planar layers, is seen as the answer to increasing capacity requirements until some denser 2D post-NAND technology becomes available.

Think of 3D flash cells as being like condos – blocks of apartments in a housing estate – with planar cells being single-storey dwellings. You can house more people in a fixed estate area using 4-storey condos than you can with single storey homes.
Hypothetically, if a 128Gbit planar chip is possible with 16nm NAND while, say, only 64Gbit is available with 19nm NAND, a 4 layer 19nm chip could provide 256Gbits. That's twice the capacity of the planar 16nm chip but within the same footprint. An 8-layer, 19nm 3D chip could provide 512Gbits, trouncing the 16nm planar cell's 128Gbit capacity.

A 4-layer, 16nm cell chip could provide 512Gbit capacity and an 8-layer chip 1,024 Gbits, making for lots of decent selling conversations between NAND chip reps and tablet/mobile phone suppliers.

It's not going to be as simple as this because vertical tunnels between the layers are needed to connect them to a base layer of logic circuitry. These connecting holes, Through-Silicon Vias (TSVs), use up some of each chip layer's area. The more layers you have, the more TSVs you need, thus (we understand) you need more logic in the base layer. Consequently the production and testing process becomes more and more complicated.

SK Hynix began full-scale production of 16nm flash in June, 2012, and moved to a 2nd gen process at the end of 2013. If it can get the number of layers high enough in its coming 3D chips then it could gain a significant capacity advantage over its competitors' planar chips.

The company is also aiming to introduce its own flash controllers and produce 3-layer cell (TLC) NAND using its 16nm technology.

Is Samsung Cutting Qualcomm's Cord?

Samsung continues its successful juggernaut of supporting competitors chips while introducing its own products. Their advances in process and circuit technology such as Through Silicon Via (TSV) will strengthen their edge.


Is this a lesson for Intel on how to leverage their technology edge...

Ron Maltiel




Samsung cuts dependence on Qualcomm
http://www.koreatimes.co.kr/www/news/tech/2012/03/129_107204.html
By Kim Yoo-chul,  03-19-2012
Smartphone maker plans to use in-house chips for Galaxy S III

Samsung Electronics will use its single-chip solutions for its next smartphone, the Galaxy S III, to lower dependence on U.S. chipmaker Qualcomm.

The move comes as Samsung, the world’s top memory chipmaker, aggressively shifting focus to more profitable and less-volatile non-memory chips.Memory chips like DRAMs and NAND flashes are used to read and write data with these chips being commoditized. Thus they are cheap, compared with non-memory chips. Non-memories are to control an entire computing system and require advanced chip-making technology.

``Samsung’s single-chip solution is a combination of long-term evolution (LTE), telecommunications and W-CDMA functions,’’ a high-ranking company executive said Monday.The firm’s Exynos-branded quad-core mobile application processors (APs) are to be equipped in the Galaxy S II’s successor, according to the executive.``We don’t think there will be big technology-related problems as we have already tested our telecommunications chips in some smartphones and tablets for consumers in North America. Also, Google’s first reference mobile, the Galaxy Nexus, is using Samsung's telecom chips,’’ said the executive.
``Samsung has a stronger intent to lower its dependence on Qualcomm and our technicians believe that we have made significant progress in producing logic-based chips for high-end devices, combined logic and memory chips for graphic controllers and core communication chips for Internet-enabled consumer devices,’’ said the executive.

Amid the explosive growth for LTE-enabled smartphones globally, the decision could hurt San Diego-based Qualcomm in the mid- to long-term, according to analysts.``Samsung is paying huge amounts to Qualcomm in return for using its single-chip solutions in strategic digital devices, however, Qualcomm is gradually losing its edge,’’ said another Samsung executive. Both executives asked not to be identified as they don’t have the right to officially speak to the media.

Samsung, which was the world’s biggest smartphone seller last year, plans to sell 250 million smartphones this year, up 25 percent from its earlier target of 200 million.


Ambitious Samsung, uneasy Qualcomm
So far, Samsung Electronics is an earnings propeller for Qualcomm because the American firm was the sole provider of one-chip solutions. ``It was believed that Qualcomm chips had greater stability and suited easy upgrades. But, that’s the old story,’’ said the Samsung executives.

In line with its plan, Samsung is improving ``through silicon via’’ (TSV) memory stocking technology. ``Our long-term plan is clear. Using Samsung solutions for Samsung products.’’

To prevent Qualcomm from losing one of its top customers, it recently announced the launch of its fifth-generation Gobi reference platform that seeks to pack support nearly all major worldwide mobile standards into a single chip. Based on the company’s Gobi LTE wireless baseband modems, the MDM9615 and MDM9215 deliver fast LTE connectivity with backwards compatibility to both HSPA+ and EV-DO networks, Qualcomm insists.

``This will allow support for regional LTE frequencies with backwards compatibility to existing 2G and 3G technologies, allowing Gobi LTE devices to connect to faster LTE network locallys and stay connected to the Internet globally on 3G networks worldwide,’’ it added.

Both Qualcomm officials in South Korea, and Samsung Electronics spokesman Ken Noh declined to comment on the Korean firm’s plans.

Samsung’s transition towards becoming a solutions provider and a chip supplier is strengthening as its mobile head Shin Jong-kyun is injecting more resources to expand the management of its own telecom chips.``Our division is not just to produce smartphones and tablets. In order to diversify portfolios, our division should do better for telecom chips,’’ said Shin.
The chip division is handling mobile APs and the head of the company’s device solution unit, which encompasses flat-screens and memory chips, recently told The Korea Times that its mobile AP-making factory in Austin, Texas, became fully operational last year. Apple’s i-devices use Samsung’s mobile APs produced at the Austin plant.

The Exynos chip is currently built using a 45-nanometer process but the new Exynos chip will be made with 32-nanometer technology, giving better performance quality without using as much power. Samsung said that in terms of performance, it gives up to 26 percent more than the current 45-nanometer chip, with battery life improved by half. The new version will be used in the Galaxy S III.

This in itself is good news for consumers who rely on battery performance when choosing devices.``The development of quad-core mobile APs is finalized and the decision to make one-chip solutions was by Shin,’’ said an executive at the company’s semiconductor division.``If Samsung successfully strengthens its management for telecommunications chips, then it expects to see more revenue from smartphones and tablets. That’s the scenario we hope,’’ said the unnamed executive.
Samsung has a cross-licensing deal with Qualcomm until 2024 to use the American firm’s single-chip solutions.
Switzerland-based brokerage UBS has raised its target for Samsung Electronics shares to 1.48 million won citing a rising shares in smartphones.