SanDisk and 3D NAND

SanDisk is strongly pursuing 3D NAND  with Toshiba. 3D NAND is a very strong contender for future advances in NAND shrinking. See more below



Some background about 3D NAND and at
3D NAND flash is coming

 Ron

Insightful, timely, and accurate semiconductor consulting.
Semiconductor information and news at - http://www.maltiel-consulting.com/

SanDisk starts beating path to 3D NAND flash

Reckons product ready for market by 2015

By Chris Mellor, 23rd July 2013 

 

SanDisk is taking its own technology route to 3D NAND - the stacking of recording layers within a flash chip atop one another to provide more capacity in the same footprint.

SanDisk is currently working on its new BiCS (Bit-Cost Scalable NAND) product and it could be deliverable in the fourth quarter of 2015, or sometime during 2016.

We asked Objective Analysis consultant and analyst Jim Handy how this was being done, and he said: "BiCS is not stacked chips, which is expensive. It's stacking bits on the same chip. The NAND is made into vertical strings of bits rather than today's horizontal strings."

That's demanding at a foundry level, as it fundamentally changes how NAND is made. A change from, say, 34nm NAND to 28nm NAND shrinks an existing process but the steps in the process generally stay the same. Not so with BiCS: "What's most problematic about this is that it changes the entire process. Semi makers are OK with tweaking their fabs to move from one process to the next by replacing 10-25 per cent of the tooling, but this will be more like 75 per cent."

Handy said it "involves more etch/deposition and not as much lithography as [existing] 2D NAND."

He made this point about NAND production costs:

The whole point of shrinks is to reduce costs by shrinking the area of a chip. Stacking chips still consumes the same area so it does nothing to reduce costs, but creating vertical structures (3D NAND or FinFETs) crams more transistors/bits into a given area so the chip can be made smaller and cheaper.

If the area of a NAND chip is reduced you can cut more of them from a standard cost wafer; therefore the cost per chip goes down.

Toshiba BiCS technology slide

SandDisk's BiCS schedule does not depend on it being first to market, according to Handy. "SanDisk, during its investor conference in May, made a very big point of saying that they would not be bringing out BiCS until it proved to provide a better ROI than 1Z. “

“Despite this,” continued Handy, “a few of the investment analysts in the room questioned why the company would fall behind Samsung, who is rumoured to be introducing its 3D NAND this year. It seemed that they didn't understand the difference between being first to market and being first to profit."

SanDisk's 1Z term refers to a cell size that is closer to 10nm than the 16nm which is generally understood by the 1Z term.