iPhone A6 Teardown Update



iPhone A6 Polysilicon Layer

 Apple iPhone is still using Samsung's fab's 32nm HKMG process based on the chipwork teardown detailed below.

More on iPhone A6 Performance Improvement

Ron
http://www.maltiel-consulting.com/






http://www.chipworks.com/blog/recentteardowns/2012/09/21/apple-iphone-5-the-a6-application-processor/
Posted on September 21, 2012 by carav

Much has already been covered about the Apple A6 processor, whether it be the move to Apple-designed ARM cores or the possible fab transfer from Samsung to TSMC. Our job with these teardowns is to provide evidence-based information so as we complete work we will confirm what is possible (and for a reasonable cost – don’t expect the circuit schematics for the whole chip).
What we can say is that the foundry for the chip we have anlayzed is confirmed to be Samsung and that, from what we see this chip is a custom designed ARM core.

Lets look in more detail at the evidence.

The die measures 9.70 mm x 9.97 mm and has the markings APL0589B01. The look of the markings is consistent with previous generation Samsung-fabricated parts.





Apple A6 Top Metal Die Photo (click to zoom)





Apple A6 Die Markings With a die area of 96.71 mm2 the die is considerably larger than the previous 2nd generation variant of the Apple A5 (~70 sq mm) which was fabricated by Samsung using their 32-nm HKMG process.



And finally (enough being coy), the following shots compare the Samsung 32 nm found in the A6 with the Samsung 32 nm in the A5 (2nd gen). We measure a contacted gate pitch of 130 nm to confirm this.


Apple A6 SEM Cross Section

Apple A6 - Samsung 32 nm HKMG

Apple A5 - Samsung 32 nm HKMG

Combining process generation with die size give you an idea of chip complexity. Simply put, if a die is larger at the same generation you can assume the chip is more complex, and in the case of the Apple A6 – this is certainly true. For comparison purposes, we are including some of the prior generation polysilicon die images to compare with the die size of this top metal image of the A6. Things will get really interesting when we can compare the block sizes of the A5 with the A6.

In order from left to right

A4 45 nm 7.3x7.3 mm

:



A5 45nm 10x12mm







 



A5 Gen 2

32nm 8.2x8.7 mm



A5x 45nm 12.9x12.8mm



A6 32nm 9.7x10mm

Let’s now turn our attention to the die layout. We see that there are three Power VR Graphics cores, as expected. Much of the world has been speculating on whether Apple is using an ‘out of the box’ ARM core or if they have custom designed some variant.

Apple A6 Polysilicon Die Photo (click to zoom)





Annotated Apple A6 Polysilicon Die Photo (click to zoom)


From the die layout we can see that the ARM core in the Apple A6 is about 50% larger than that previously found in the A5:



A5: 3.65 mm x 2.83 mm (10.3 mm2), each is 1.82 mm x 2.83 mm



A6: 4.15 mm x 3.81 mm (15.8 mm2), each is 4.15 mm x 1.91 mm



The feature that really jumps out at you in the A6 poly layer die photo is the dual ARM core. The layout for this CPU appears to have been done by hand. Normally large digital blocks of logic use automated “place and route” CAD software to layout all the digital cells and connect them. This is the style used on the rest of the digital blocks on this chip (shown below). This is also the style that has been used for the CPUs in all previous Apple iPhone and iPad processors. However, on this A6 chip, the ARM core appears to have been laid out by hand. This does lend credence to the current thinking that this is a custom ARM core specifically designed for the A6.





Typical automatically laid out standard cell block (A6 GPU)



Layout of the ARM core in the Apple A6

So this is the first Apple core we’ve seen done with custom digital layout. In fact, with the exception of Intel CPUs, it’s one of the first custom laid out digital cores we’ve seen in years! This must have taken a large team of layout engineers quite a long time. The obvious question is, why? This is a more expensive and time-consuming method of layout. However it usually results in a faster maximum clock rate, and sometimes results in higher density. Certainly one possibility is that Apple could not meet timing on a automatically laid out block, and chose to go with a custom laid out block. Was this a decision at the architecture stage, or did timing fail late in the design cycle and a SWAT team of layout engineers brought in to save the day? We’ll probably never know, but it is fascinating, and also 2X faster (according to the below image)


Apple promoting A6 performance at iPhone 5 launch







And now for a bit of the fun part



Last time around (with Apple A5X in the iPad 3) we gave out a full resolution die photo for people to use as their screen backgrounds. It seemed to be pretty popular so this time around, we’re doing it again. Given that the die is square and we are a bunch of engineers who don’t like to mess with reality, we didn’t get too creative with making it fit the 1136 x 640 screen.



However, we are also providing zoomed-in screen resolution versions of the rectangular graphics and logic cores for a better fit. Now you can show people your background and say, “my ARM core is fancier than your ARM core”.



Full die photo 640x649 (click to zoom and download)


Apple A6 Graphics Core (click to zoom and download)



Apple A6 ARM Cores (click to zoom and download)





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Other Pages in the analysis of the iPhone5



Page 1 – Initial Teardown of the iPhone 5



Page 2 – Camera and Battery



Page 3 – Apple A6 Analysis



Page 4 – A closer look at the RF Chips (coming soon)